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BU8272GUW Datasheet(PDF) 9 Page - Rohm |
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BU8272GUW Datasheet(HTML) 9 Page - Rohm |
9 / 18 page Technical Note 9/17 BU8272GUW www.rohm.com 2009.09 - Rev.A © 2009 ROHM Co., Ltd. All rights reserved. 1.4 Acknowledge After start condition is occurred, 8 bits data will be transferred. Then the “Master” opens SDA and “Slave” de-asserts SDA to “0” as an “Acknowledge” returned. Fig. 8 Acknowledge 1.5 Writing protocol A writing protocol is shown in Fig.8-5 below. GPIO register address in BU8272GUW is transferred after one byte of slave address with a write commend. The 3 rd byte data is written to internal register which defined by the 2nd byte. After the each byte transfer, the register address will be automatically increased. However, when the register address increased to the final address (09h), it will be reset to (00h) after the byte transfer. GPIO register address (00h) is assigned to GPIO register[7:0], the register address (01h) is assigned to GPIO register[15:8], and the register address (02h) is assigned to GPIO register[19:16]. Only the 4 bits LSB data are valid in the register with GPIO register address (02h). Fig. 9 Writing protocol SCL 1 2 8 9 SDA output from “Master” SDA output from “Slave” Acknowledg e Not acknowledge S START condition Clock pulse For Acknowledgs S A A A P data Register address Slave address Transmit from master Transmit from slave A=acknowledge A=not acknowledge S=Start condition P=Stop condition R/W=0(write) data A Register address increment Register address increment D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 XXXX A3 A2 A1 A0 XX XX XX 0 X |
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