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A4986 Datasheet(PDF) 6 Page - Allegro MicroSystems |
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A4986 Datasheet(HTML) 6 Page - Allegro MicroSystems |
6 / 14 page DMOS Dual Full-Bridge PWM Motor Driver with Overcurrent Protection A4986 6 Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Functional Description Device Operation. The A4986 is designed to operate one stepper motor in full, half, or quarter step mode. The currents in each of the output full-bridges, all N-channel DMOS, are regu- lated with fixed off-time pulse width modulated (PWM) control circuitry. Each full-bridge peak current is set by the value of an external current sense resistor, RSx, and a reference voltage, VREFx. Percentages of the peak current are set using a 2-bit nonlinear DAC that programs 33%, 66%, or 100% of the peak current, or disables the outputs. Internal PWM Current Control. Each full-bridge is con- trolled by a fixed off-time PWM current control circuit that limits the load current to a desired value, ITRIP. Initially, a diagonal pair of source and sink FET outputs are enabled and current flows through the motor winding and the current sense resistor, RSx. When the voltage across RSx equals the DAC output voltage, the current sense comparator resets the PWM latch. The latch then turns off the sink and source FETs. The maximum value of current limiting is set by the selection of RSx and the voltage at the VREF pin. The transconductance func- tion is approximated by the maximum value of current limiting, ITripMAX (A), which is set by ITripMAX = VREF /(8 R S) where RS is the resistance of the sense resistor (Ω) and VREF is the input voltage on the REF pin (V). The 2-bit DAC output reduces the VREF output to the current sense comparator in precise steps, such that Itrip = (%ITripMAX /100) × ITripMAX It is critical that the maximum rating (0.5 V) on the SENSE1 and SENSE2 pins is not exceeded. Fixed Off-Time. The internal PWM current control circuitry uses a one-shot circuit to control the duration of time that the DMOS FETs remain off. The off-time, tOFF, is determined by the ROSC terminal. The ROSC terminal has two settings: ▪ ROSC tied to VDD or ground — off-time internally set to 30 μs ▪ ROSC through a resistor to ground — off-time is determined by the following formula tOFF ≈ ROSC ⁄ 825 Where tOFF is in μs. Blanking. This function blanks the output of the current sense comparators when the outputs are switched by the internal current control circuitry. The comparator outputs are blanked to prevent false overcurrent detection due to reverse recovery currents of the clamp diodes, and switching transients related to the capacitance of the load. The blank time, tBLANK (μs), is approximately tBLANK ≈ 1 μs Shorted-Load and Short-to-Ground Protection. If the motor leads are shorted together, or if one of the leads is shorted to ground, the driver will protect itself by sensing the overcurrent event and disabling the driver that is shorted, protect- ing the device from damage. In the case of a short-to-ground, the device will remain disabled (latched) until the S¯¯L¯¯E¯¯E¯¯P¯ input goes high or VDD power is removed. A short-to-ground overcurrent event is shown in figure 1. When the two outputs are shorted together, the current path is through the sense resistor. After the blanking time ( ≈1 μs) expires, the sense resistor voltage is exceeding its trip value, due to the overcurrent condition that exists. This causes the driver to go into a fixed off-time cycle. After the fixed off-time expires the driver turns on again and the process repeats. In this condition the driver is completely protected against overcurrent events, but the short is repetitive with a period equal to the fixed off-time of the driver. This condition is shown in figure 2. If the driver is operating in Mixed decay mode, it is normal for the positive current to spike, due to the bridge going in the for- ward direction and also in the negative direction, as a result of the direction change implemented by the Mixed decay feature. This is shown in figure 3. In both instances the overcurrent circuitry is protecting the driver and prevents damage to the device. Charge Pump (CP1 and CP2). The charge pump is used to generate a gate supply greater than that of VBB for driving the Functional Description |
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