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BU9262AFS Datasheet(PDF) 8 Page - Rohm |
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BU9262AFS Datasheet(HTML) 8 Page - Rohm |
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8 / 17 page  8/16 ●Pin description, Block diagram, Application circuit ＜ BU9262AFS＞ No. Symbol Function 1 NC Not connected 2 TESTB Test negative logic input pin (normally “H” input) 3 SCK Serial clock input 4 SLT Serial latch input 5 SI Serial data input 6 CLKO Oscillation output pin 7 CLKI Oscillation input pin 8 NC Not connected 9 DSOUT Delay source output 10 TESTOUT Test output pin (normally “L” output) 11 LPF1I1 12 LPF1I2 13 LPF1O LPF capacitor external pin 14 ADI 15 ADO ADC capacitor connection pin 16 GND GND pin 17 DAI 18 DAO DAC capacitor connection pin 19 LPF2I1 20 LPF2I2 21 LPF2O LPF capacitor external pin 22 VOIN Delay signal / volume input pin 23 DSIG Delay signal output 24 VREF Analog reference voltage 25 RCOUT Rch output 26 LCOUT Lch output 27 FBOUT Feedback signal output 28 RCIN Rch input 29 LCIN Lch input 30 VCC Power source pin 31 MICIN Microphone input (microphone amplifier output connected) 32 MIXIN Mix signal input ・ Description of terminal ・ Application circuit 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 テストモード 負論理入力 シリアル コントロール 回路 クロック LPF テスト出力 ADC LPF DAC 処理 RAM FBVOL ＋ 入力ミキサ セレクタ DLYVOL ＋ ＋ 出力 ミキシング 基準電圧 SERIAL CLOCK SERIAL LATCH SERIAL DATA R R 2MHz 1u NP 0.01u 2200p 0.01u ＋ ＋ ＋ ＋ ＋ ＋ R 1M 1u 1u 1u 0.33u 2.2u 2.2u 2.2u ＋ 0.1u 2200p ＋ 0.01u 0.01u MIC IN Lch IN Rch IN Lch OUT Rch OUT DSIG 47u 0.1u 47u Fig.29 Pin assignment Fig.30 Application circuit Test mode negative logic input Serial control circuit Clock Test output Input mixer selector Output mixing Reference voltage 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 NC TE S TB SC K SLT SI CLK O CLK I NC DS O UT TE S TO U LP F 1I1 LP F 1I2 LP F 1O ADI ADO GN D DAI DAO LP F 2I1 LP F 2I2 LP F 2O VO IN DS IG VR E F RCO U T LC O U T FB O U T RCIN LC IN VC C MIC IN MIX IN ・ Pin assignment Fig.28 Block diagram ・ Block diagram Processing TESTOUT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 テストモード 負論理入力 シリアル コントロール 回路 クロック LPF テストモード出力 コントロール ADC LPF DAC 処理 RAM FBVOL ＋ 入力ミキサ セレクタ DLYVOL ＋ ＋ 出力 ミキシング 基準電圧 リセット Test mode negative logic input Serial control circuit Clock Test mode output Input mixer selector Output mixing Reference voltage Reset Control Processing |
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