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X25045PI Datasheet(PDF) 2 Page - Xicor Inc.

Part # X25045PI
Description  Programmable Watchdog Supervisory E2PROM
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Manufacturer  XICOR [Xicor Inc.]
Direct Link  http://www.xicor.com
Logo XICOR - Xicor Inc.

X25045PI Datasheet(HTML) 2 Page - Xicor Inc.

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X25043/45
2
PIN DESCRIPTIONS
Serial Output (SO)
SO is a push/pull serial data output pin. During a read
cycle, data is shifted out on this pin. Data is clocked out
by the falling edge of the serial clock.
Serial Input (SI)
SI is the serial data input pin. All opcodes, byte ad-
dresses, and data to be written to the memory are input
on this pin. Data is latched by the rising edge of the serial
clock.
Serial Clock (SCK)
The Serial Clock controls the serial bus timing for data
input and output. Opcodes, addresses, or data present
on the SI pin is latched on the rising edge of the clock
input, while data on the SO pin changes after the falling
edge of the clock input.
Chip Select (
CS)
When
CS is HIGH, the X25043/45 is deselected and the
SO output pin is at high impedance and, unless an
internal write operation is underway, the X25043/45 will
be in the standby power mode.
CS LOW enables the
X25043/45, placing it in the active power mode. It should
be noted that after power-up, a HIGH to LOW transition
on
CS is required prior to the start of any operation.
Write Protect (
WP)
When
WP is LOW, nonvolatile writes to the X25043/45
are disabled, but the part otherwise functions normally.
When
WP is held HIGH, all functions, including nonvola-
tile writes operate normally.
WP going LOW while CS is
still LOW will interrupt a write to the X25043/45. If the
internal write cycle has already been initiated,
WP going
LOW will have no affect on a write.
Reset (
RESET, RESET)
X25043/45,
RESET/RESET is an active LOW/HIGH,
open drain output which goes active whenever VCC
falls below the mimimum VCC sense level. It will remain
active until VCC rises above the minimum VCC sense
level for 200ms.
RESET/RESET also goes active if
the Watchdog timer is enabled and
CS remains either
HIGH or LOW longer than the Watchdog time-out
period. A falling edge of
CS will reset the watchdog timer.
PIN NAMES
Symbol
Description
CS
Chip Select Input
SO
Serial Output
SI
Serial Input
SCK
Serial Clock Input
WP
Write Protect Input
VSS
Ground
VCC
Supply Voltage
RESET/RESET
Reset Output
3844 PGM T01.1
PIN CONFIGURATION
3844 ILL F02.3
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
VCC
RESET/RESET
SCK
SI
8-LEAD DIP/SOIC
X25043/45
14-LEAD TSSOP
X25043/45
CS
SO
NC
NC
NC
WP
VSS
VCC
RESET/RESET
NC
NC
NC
SCK
SI
14
13
12
11
10
9
8
1
2
3
4
5
6
7


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