X25F064/032/016/008

SerialFlash™ and Block Lock™ Protection are trademarks of Xicor, Inc.

FEATURES

• 1MHz Clock Rate

• SPI Serial Interface

• 64K/32K/16K/8K Bits

— 32 Byte Small Sector Program Mode

• Low Power CMOS

—<1

— <5mA Active Current

• 1.8V – 3.6V or 5V “Univolt” Read and

Program Power Supply Versions

• Block Lock Protection

• Built-in Inadvertent Program Protection

— Power-Up/Power-Down protection circuitry

— Program Enable Latch

— Program Protect Pin

• Self-Timed Program Cycle

— 5ms Program Cycle Time (Typical)

• High Reliability

— Endurance: 100,000 cycles per byte

— Data Retention: 100 Years

— ESD protection: 2000V on all pins

• 8-Lead PDlP Package

• 8-Lead 150 mil SOIC Packages

• 32K, 16K, 8K available in 14-Lead TSSOP,

64K available in 20-Lead TSSOP

DESCRIPTION

The X25F064/032/016/008 family are 8/16/32/64K-bit

CMOS SerialFlash memory, internally organized

X 8. They feature a “Univolt” Program and Read voltage,

Serial Peripheral Interface (SPI), and software protocol

allowing operation on a simple three-wire bus. The bus

signals are a clock input (SCK), plus separate data in

(SI) and data out (SO) lines. Access to the device is

controlled through a chip select (

CS) input, allowing any

number of devices to share the same bus.

The X25F064/032/016/008 also features two additional

inputs that provide the end user with added flexibility. By

asserting the

HOLD input, the X25F064/032/016/008

will ignore transitions on its inputs, thus allowing the host

to service higher priority interrupts. The

PP input can be

used as a hardwire input to the X25F064/032/016/008

disabling all program attempts to the status register,

thus providing a mechanism for limiting end user capa-

bility of altering 0, 1/4, 1/2, or all of the memory.

The X25F064/032/016/008 utilizes Xicor’s proprietary

flash cell, providing a minimum endurance

of 100,000 cycles and a minimum data retention of

100 years.

FUNCTIONAL DIAGRAM

© Xicor, Inc. 1995, 1996 Patents Pending

Characteristics subject to change without notice

6685-3.1 8/29/96 T3/C0/D0 SH

6685 ILL F01.4

COMMAND

DECODE

AND CONTROL

LOGIC

X

DECODE

LOGIC

MEMORY

ARRAY

SI

SO

CS

HOLD

STATUS

REGISTER

PROGRAMMING

CONTROL LOGIC

PP

HIGH VOLTAGE

CONTROL

SECTOR DECODE LOGIC

32

8

DATA REGISTER

SCK

A V A I L A B L E

AN61 • AN75 • AN77 • AN79 • AN82