74AUP2G240_4

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 04 — 30 June 2009

4 of 20

NXP Semiconductors

74AUP2G240

Low-power dual inverting buffer/line driver; 3-state

7.

Functional description

[1]

H = HIGH voltage level;

L = LOW voltage level;

X = don’t care;

Z = high-impedance OFF-state.

8.

Limiting values

[1]

The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.

[2]

For VSSOP8 packages: above 110

°C the value of P

For XSON8, XSON8U and XQFN8U packages: above 118

°C the value of P

9.

Recommended operating conditions

Table 4.

Function table[1]

Input

Output

nOE

nA

nY

LLH

LH

L

HX

Z

Table 5.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol

Parameter

Conditions

Min

Max

Unit

supply voltage

−0.5

+4.6

V

input clamping current

−50

-

mA

input voltage

[1]

−0.5

+4.6

V

output clamping current

−50

-

mA

output voltage

Active mode and Power-down mode

[1]

−0.5

+4.6

V

output current

-

±20

mA

supply current

-

50

mA

ground current

−50

-

mA

storage temperature

−65

+150

°C

total power dissipation

[2] -

250

mW

Table 6.

Operating conditions

Symbol

Parameter

Conditions

Min

Max

Unit

supply voltage

0.8

3.6

V

input voltage

0

3.6

V

output voltage

Active mode

0

V

0

3.6

V

ambient temperature

−40

+125

°C

∆t/∆V

input transition rise and fall rate

0

200

ns/V