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74HC2G66DC Datasheet(PDF) 8 Page - NXP Semiconductors |
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74HC2G66DC Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 21 page 74HC_HCT2G66_6 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 06 — 2 April 2010 8 of 21 NXP Semiconductors 74HC2G66; 74HCT2G66 Dual single-pole single-throw analog switch [1] All typical values are measured at Tamb =25 °C. [2] tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. [3] CPD is used to determine the dynamic power dissipation PD (μW). PD =CPD × VCC2 × fi + Σ((CL × CSW) × VCC2 × fo)where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; CSW = maximum switch capacitance in pF (see Table 7); VCC = supply voltage in volts; Σ((C L × CSW) × VCC 2 × f o) = sum of outputs. 11.1 Waveforms and test circuit 74HCT2G66 tpd propagation delay nY to nZ or nZ to nY; RL = ∞ Ω; see Figure 9 [2] VCC = 4.5 V - 2 15 - 18 ns ten enable time nE to nY or nZ; see Figure 10 [2] VCC = 4.5 V - 13 30 - 36 ns tdis disable time nE to nY or nZ; see Figure 10 [2] VCC = 4.5 V - 13 44 - 53 ns CPD power dissipation capacitance VI =GND to VCC − 1.5 V [3] -9- - - pF Table 9. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); For test circuit see Figure 11. Symbol Parameter Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 9. Input (nY or nZ) to output (nZ or nY) propagation delays 001aaa541 tPLH tPHL VM VM VM VM nY or nZ input nZ or nY output GND VI VOH VOL |
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