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7 page 
VCC Input Generator 50 W R A B C includesfixture L andinstrumentation capacitance RE VI VO CL= 15 pF ±20% S1 0 V 1.5 V Generator: PRR =100 kHz, 50% dutycycle, r< 6 ns, tf< 6ns, ZO= 50 W t 50% 3 V 0 V VI VCC VOL tPZL tPLZ V O 50% 50% 10% 1k ±1% W A B PulseGenerator 15 sduration 1%dutycycle t ,t 100ns m £ r f R Note:Thistestisconductedtotestsurvivabilityonly. DatastabilityattheRoutputisnotspecified. D + _ RE DE 0V 3V 100 ±1% W D R DE RE 54 W GND1 V TEST GND2 A B GND1 S 1 2V 0.8V V orV OH OL 1kW CL =15pF (includesprobeand jigcapacitance) V orV OH OL VCC1 VCC2 C=0.1 F 1% m ± C=0.1 F 1% m ± www.ti.com SLOS581C – MAY 2008 – REVISED OCTOBER 2009 PARAMETER MEASUREMENT INFORMATION (continued) Figure 10. Receiver Enable Test Circuit and Waveforms, Data Output Low Figure 11. Transient Over-Voltage Test Circuit Figure 12. Half-Duplex Common-Mode Transient Immunity Test Circuit Copyright © 2008–2009, Texas Instruments Incorporated 7 Product Folder Link(s): ISO3080, ISO3086 ISO3082, ISO3088 |
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