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74HCT9046APW Datasheet(PDF) 1 Page - NXP Semiconductors |
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74HCT9046APW Datasheet(HTML) 1 Page - NXP Semiconductors |
1 / 43 page 1. General description The 74HCT9046A is a high-speed Si-gate CMOS device. It is specified in compliance with JEDEC standard no 7A. 2. Features I Operation power supply voltage range from 4.5 V to 5.5 V I Low power consumption I Inhibit control for ON/OFF keying and for low standby power consumption I center frequency up to 17 MHz (typical) at VCC = 5.5 V I Choice of two phase comparators: N PC1: EXCLUSIVE-OR N PC2: Edge-triggered JK flip-flop I No dead zone of PC2 I Charge pump output on PC2, whose current is set by an external resistor Rbias I center frequency tolerance ±10 % I Excellent Voltage Controlled Oscillator (VCO) linearity I Low frequency drift with supply voltage and temperature variations I On-chip band gap reference I Glitch free operation of VCO, even at very low frequencies I Zero voltage offset due to operational amplifier buffering I ESD protection: N HBM JESD22-A114F exceeds 2000 V N MM JESD22-A115-A exceeds 200 V 74HCT9046A PLL with band gap controlled VCO Rev. 06 — 15 September 2009 Product data sheet |
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