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74LVC3GU04GT Datasheet(PDF) 2 Page - NXP Semiconductors |
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74LVC3GU04GT Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 17 page 74LVC3GU04_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 11 November 2009 2 of 17 NXP Semiconductors 74LVC3GU04 Triple inverter 4. Marking [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 74LVC3GU04GT −40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 × 1.95 × 0.5 mm SOT833-1 74LVC3GU04GD −40 °C to +125 °C XSON8U plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 3 × 2 × 0.5 mm SOT996-2 74LVC3GU04GM −40 °C to +125 °C XQFN8U plastic extremely thin quad flat package; no leads; 8 terminals; UTLP based; body 1.6 × 1.6 × 0.5 mm SOT902-1 Table 1. Ordering information …continued Type number Package Temperature range Name Description Version Table 2. Marking codes Type number Marking code[1] 74LVC3GU04DP VU04 74LVC3GU04DC VU4 74LVC3GU04GT VU4 74LVC3GU04GD VU4 74LVC3GU04GM VU4 Fig 1. Logic symbol Fig 2. IEC logic symbol 001aah793 1A 1Y 2A 2Y 3A 3Y 1 1 001aah794 1 Fig 3. Logic diagram (one gate) mna636 A Y 100 Ω VCC VCC |
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