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74LVC16374A Datasheet(PDF) 3 Page - NXP Semiconductors |
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74LVC16374A Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 19 page 74LVC_LVCH16374A_7 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 07 — 23 March 2010 3 of 19 NXP Semiconductors 74LVC16374A; 74LVCH16374A 16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state Fig 3. Logic diagram 001aaa255 1CP 1OE to 7 other channels D CP Q FF1 1Q0 1D0 2CP 2OE to 7 other channels D CP Q FF2 2Q0 2D0 Fig 4. Bus hold circuit to internal circuit mna705 VCC data input |
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