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74LVCH245ABQ Datasheet(PDF) 4 Page - NXP Semiconductors |
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74LVCH245ABQ Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 17 page 74LVC_LVCH245A_5 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 25 August 2009 4 of 17 NXP Semiconductors 74LVC245A; 74LVCH245A Octal bus transceiver; 3-state 6. Functional description [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high impedance OFF-state. 7. Limiting values [1] The minimum input voltage ratings may be exceeded if the input current ratings are observed. [2] The output voltage ratings may be exceeded if the output current ratings are observed. [3] For SO20 packages: above 70 °C derate linearly with 8 mW/K. For (T)SSOP20 packages: above 60 °C derate linearly with 5.5 mW/K. For DHVQFN20 and DHXQFN20U packages: above 60 °C derate linearly with 4.5 mW/K. Table 3. Function selection[1] Inputs Inputs/outputs OE DIR An Bn L L An = Bn inputs L H inputs Bn = An HX Z Z Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 +6.5 V IIK input clamping current VI <0V −50 - mA VI input voltage [1] −0.5 +6.5 V IOK output clamping current VO >VCC or VO <0V - ±50 mA VO output voltage output HIGH or LOW [2] −0.5 VCC + 0.5 V output 3-state [2] −0.5 +6.5 V IO output current VO = 0 V to VCC - ±50 mA ICC supply current - 100 mA IGND ground current −100 - mA Tstg storage temperature −65 +150 °C Ptot total power dissipation Tamb = −40 °C to +125 °C [3] - 500 mW |
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