ADC1412D080 datasheet(9/37 Pages) NXP

Part #	ADC1412D080

Description	Dual 14-bit ADC 65, 80, 105 or 125 Msps CMOS or LVDS DDR digital outputs

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Manufacturer	NXP [NXP Semiconductors]

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ADC1412D065_080_105_125_2

Objective data sheet

Rev. 02 — 4 June 2009

9 of 37

NXP Semiconductors

ADC1412D065/080/105/125

Dual 14-bit ADC 65, 80, 105 or 125 Msps

Clock inputs: pins CLKP and CLKM

AC coupled; LVPECL, LVDS and sine wave

Vi(clk)dif

differential clock input voltage

peak-to-peak

0.2

0.8

<tbd>

V

LVCMOS

VI

input voltage

0.3VDDA

-

0.7VDDA V

Logic Input: pin CTRL

VIL

LOW-level input voltage

-

0

-

V

LOW-medium level

-

0.3VDDA

-V

medium-HIGH level

-

0.6VDDA

-

VIH

HIGH-level input voltage

-

VDDA

-V

IIL

LOW-level input current

<tbd>

-

<tbd>

µA

IIH

HIGH-level input current

−10

-

+10

µA

Serial Peripheral Interface: pins CS, SDIO/ODS, SCLK/DFS

VIL

LOW-level input voltage

0

-

0.3VDDA V

VIH

HIGH-level input voltage

0.7VDDA

-VDDA

V

IIL

LOW-level input current

−10

-

+10

µA

IIH

HIGH-level input current

−50

-

+50

µA

CI

input capacitance

-

4

-

pF

Digital Outputs: CMOS mode - pins DA13 to DA0, DB13 to DB0, OTRA, OTRB AND DAV

Output levels, VDDO=3 V

VOL

LOW-level output voltage

IOL = <tbd>

OGND

-

0.2VDDO V

VOH

HIGH-level output voltage

IOH = <tbd>

0.8VDDO

-VDDO

V

IOL

LOW-level output current

3-state; output level = 0 V

-

<tbd>

-

µA

IOH

HIGH-level output current

3-state; output level = VDDA

-

<tbd>

-

µA

CO

output capacitance

high impedance; OE = HIGH

-

3

-

pF

Output levels, VDDO=1.8 V

VOL

LOW-level output voltage

IOL = <tbd>

OGND

-

0.2VDDO V

VOH

HIGH-level output voltage

IOH = <tbd>

0.8VDDO

-VDDO

V

Digital Outputs, LVDS DDR mode - pins DA13P/DA13M to DA0P/DA0M, DB13P/DB13M to DB0P/DBOM, DAVP and

DAVM

Output levels, VDDO = 3 V only, RL = 100 Ω

VO(offset)

output offset voltage

output buffer current set to

3.5 mA

-

1.2

-

V

VO(dif)

differential output voltage

output buffer current set to

3.5 mA

-

350

-

mV

CO

output capacitance

-

<tbd>

-

pF

Analog inputs: pins INAP, INAM, INBP and INBM

II

Input current

−5-

+5

µA

RI

Input resistance

-

<tbd>

-

Ω

Table 6.

Static characteristics …continued

Typical values measured at VDDA =3V, VDDO = 1.8 V, Tamb =25 °C and CL = 5 pF; min and max values are across the full

temperature range Tamb = −40 °C to +85 °CatVDDA =3V, VDDO = 1.8 V; VINAP − VINAM = −1 dBFS; VINBP − VINBM = −1 dBFS;

internal reference mode; applied to CMOS and LVDS interface; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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