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CS61884 Datasheet(PDF) 1 Page - Cirrus Logic

Part No. CS61884
Description  Octal T1/E1/J1 Line Interface Unit
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Maker  CIRRUS [Cirrus Logic]
Homepage  http://www.cirrus.com
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Copyright
© Cirrus Logic, Inc. 2005
(All Rights Reserved)
http://www.cirrus.com
CS61884
Octal T1/E1/J1 Line Interface Unit
Features
Industry-standard Footprint
Octal E1/T1/J1 Short-haul Line Interface Unit
Low Power
No external component changes for
100
Ω/120 Ω/75 Ω operation.
Pulse shapes can be customized by the user.
Internal AMI, B8ZS, or HDB3 Encoding/Decoding
LOS Detection per T1.231, ITU G.775, ETSI 300-233
G.772 Non-Intrusive Monitoring
G.703 BITS Clock Recovery
Crystal-less Jitter Attenuation
Serial/Parallel Microprocessor Control Interfaces
Transmitter Short Circuit Current Limiter (<50mA)
TX Drivers with Fast High-Z and Power Down
JTAG boundary scan compliant to IEEE 1149.1.
144-Pin LQFP or 160-Pin BGA Package
ORDERING INFORMATION
CS61884-IQ
144-pin LQFP
CS61884-IQZ
144-pin LQFP, Lead Free
CS61884-IB
160-pin FBGA
Description
The CS61884 is a full-featured octal E1/T1/J1 short-haul
LIU that supports both 1.544 Mbps or 2.048 Mbps data
transmission. Each channel provides crystal-less jitter
attenuation that complies with the most stringent stan-
dards.
Each
channel
also
provides
internal
AMI/B8ZS/HDB3 encoding/decoding. To support en-
hanced system diagnostics, channel zero can be
configured for G.772 non-intrusive monitoring of any of
the other 7 channels’ receive or transmit paths.
The CS61884 makes use of ultra-low-power, matched-
impedance transmitters and receivers to reduce power
beyond that achieved by traditional driver designs. By
achieving a more precise line match, this technique also
provides superior return loss characteristics. Additional-
ly, the internal line matching circuitry reduces the
external component count. All transmitters have controls
for independent power down and High-Z.
Each receiver provides reliable data recovery with over
12 dB of cable attenuation. The receiver also incorpo-
rates LOS detection compliant to the most recent
specifications.
RPOS
RNEG
TPOS
TNEG
TCLK
LOS
RTIP
RRING
TTIP
TRING
RCLK
0
1
7
JTAG Interface
Driver
Receiver
LOS
Transmit
Control
Pulse
Shaper
Data
Recovery
Jitter
Attenuator
Clock
Recovery
Host Interface
JTAG
Serial
Port
Host
Serial/Parallel
Port
AUG ‘05
DS485F1




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