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PSMN3R0-30YL Datasheet(PDF) 7 Page - NXP Semiconductors |
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PSMN3R0-30YL Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 14 page PSMN3R0-30YL_3 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 28 December 2009 7 of 14 NXP Semiconductors PSMN3R0-30YL N-channel TrenchMOS logic level FET Fig 9. Input and reverse transfer capacitances as a function of gate-source voltage; typical values Fig 10. Drain-source on-state resistance as a function of gate-source voltage; typical values Fig 11. Sub-threshold drain current as a function of gate-source voltage Fig 12. Gate-source threshold voltage as a function of junction temperature 003aac574 0 1000 2000 3000 4000 5000 02468 10 VGS (V) C (pF) Ciss Crss 003aac569 2 3 4 357 9 11 VGS (V) RDSon (m Ω) 003aab271 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 01 23 VGS (V) ID (A) max typ min 003a a c337 0 1 2 3 -60 0 60 120 180 Tj ( °C) VGS(th) (V) max typ min |
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