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PSMN4R0-30YL Datasheet(PDF) 4 Page - NXP Semiconductors |
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PSMN4R0-30YL Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 14 page PSMN4R0-30YL_3 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 31 December 2009 4 of 14 NXP Semiconductors PSMN4R0-30YL N-channel TrenchMOS logic level FET 5. Thermal characteristics Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage 003aac650 10 -1 1 10 10 2 10 3 10 -1 1 10 10 2 VDS (V) ID (A) Limit RDSon = VDS / ID DC 100 μs 10 μs 100 ms 10 ms 1 ms Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base see Figure 4 - 1 1.82 K/W Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration 003aac648 single shot 0.2 0.1 0.05 0.02 10 -2 10 -1 1 10 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 1 tp (s) Zth(j-mb) (K/W) δ = 0.5 tp T P t tp T δ = |
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