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TPIC8101DWRG4 Datasheet(PDF) 8 Page - Texas Instruments |
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TPIC8101DWRG4 Datasheet(HTML) 8 Page - Texas Instruments |
8 / 20 page TPIC8101 KNOCK SENSOR INTERFACE SLIS110A − APRIL 2003 − REVISED MAY 2005 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 function principle The TPIC8101 is designed for knock sensor signal conditioning in automotive applications. The device is an analog interface between the engine acoustical sensors or accelerometers and the fuel management systems of a gasoline engine. The two wide-band amplifiers process signals from the piezoelectric sensors. Outputs of the amplifiers feed a channel select mux switch and then a 3rd order antialiasing filter. This signal is converted using an analog-to-digital conversion (10 bits with a sampling frequency of 200 kHz) prior to the gain stage. The gain stage is adjustable via the SPI to compensate for the knock energies. The gain setting is selectable up to 64 values ranging from 0.111 to 2.0. The output of the gain stage feeds a band-pass filter circuit to process the particular frequency component associated with the engine and transducer. The band-pass filter has a gain of two and a center frequency range between 1.22 kHz and 19.98 kHz (64-bit selection). The output from this stage is internally clamped. The output from the band-pass filter is full-wave rectified with its output clamped below VDD. The full-wave rectified signals are integrated using an integrator time constant set by the SPI and integration time window set by the pulse width of INT/HOLD. At the start of each knock window, the integrator output is reset. The output of the integrator is internally clamped and the digital output may be directly interfaced to the microprocessor. The integrated signal is converted to an analog format by a 10-bit DAC. The microprocessor may interface to this signal, reads this data, and adjusts the spark ignition timing to optimize fuel efficiency related to load versus engine RPM. description of the functional terminals supply voltage (VDD) The VDD terminal is the input supply for the IC, typically 5 V ±5% tolerant. A noise filter capacitor of 4.7 µF (typ) is required on this terminal to ensure stability of the internal circuits. ground (GND) The GND terminal is connected to the system ground rail. reference supply (Vref) The Vref is an internally generated supply reference voltage for biasing the amplifier inputs. The terminal is used to decouple any noise in the system by placing an external capacitor of 22 nF (typ). buffered integrator output (OUT) The OUT terminal is the output of the integrated signal. This is an analog signal interfaced to the microprocessor A/D channel for data acquisition. A capacitor of 2.2 nF is used to stabilize the signal output. integration/hold mode selection (INT/HOLD) The INT/HOLD is an input control signal from the microprocessor to select either to integrate the sensed signal or to hold the data for acquisition. There is an internal pulldown on this terminal (default HOLD mode). chip select for SPI (CS) The CS terminal allows serial communication to the IC through the SPI from a master controller. The chip select is active low with an internal pullup (default inactive). |
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