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LPC2880 Datasheet(PDF) 9 Page - NXP Semiconductors |
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LPC2880 Datasheet(HTML) 9 Page - NXP Semiconductors |
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9 / 43 page  LPC2880_LPC2888_3 © NXP B.V. 2008. All rights reserved. Preliminary data sheet Rev. 03 — 17 April 2008 9 of 43 NXP Semiconductors LPC2880; LPC2888 16/32-bit ARM microcontrollers with external memory interface CKE/P1[9] B10 FO clock enable; active HIGH for SDRAM; GPIO pin DQM0/P1[10] C12 FO data mask output for D[7:0], active HIGH for SDRAM; GPIO pin DQM1/P1[11] A11 FO data mask output for D[15:8], active HIGH for SDRAM; GPIO pin DYCS/P1[8] B9 FO chip select, active LOW for SDRAM; GPIO pin MCLKO/P1[14] A10 FO clock for SDRAM and SyncFlash memory; GPIO pin OE/P1[18] A17 FO output enable, active LOW for static memory; GPIO pin RAS/P1[17] A9 FO row address strobe, active LOW for SDRAM; GPIO pin RPO/P1[19] B1 FO reset power-down, active LOW for SyncFlash memory; GPIO pin STCS0/P1[5] C9 FO chip select, active LOW for static memory bank 0; GPIO pin STCS1/P1[6] A8 FO chip select, active LOW for static memory bank 1; GPIO pin STCS2/P1[7] B11 FO chip select, active LOW for static memory bank 2; GPIO pin WE/P1[15] C11 FO write enable, active LOW for SDRAM and static memory; GPIO pin GPIO and mode control MODE1/P2[2] K18 FI start-up mode pin 1 (pull-down); 5 V tolerant GPIO pin MODE2/P2[3] J16 FI start-up mode pin 2 (pull-down); 5 V tolerant GPIO pin P2[0] K16 FI 5 V tolerant GPIO pin P2[1] K17 FI 5 V tolerant GPIO pin I2C-bus interface SCL H16 I/O serial clock (input/open-drain output); 5 V tolerant pin SDA J17 I/O serial data (input/open-drain output); 5 V tolerant pin JTAG interface JTAG_SEL U4 I JTAG selection (pull-down); 5 V tolerant pin JTAG_TCK V4 I JTAG reset input (pull-down); 5 V tolerant pin JTAG_TDI T5 I JTAG data input (pull-up); 5 V tolerant pin JTAG_TMS U12 I JTAG mode select input (pull-up); 5 V tolerant pin JTAG_TRST T13 I JTAG reset input (pull-down); 5 V tolerant pin JTAG_TDO U13 O JTAG data output; 5 V tolerant pin LCD interface LCS/P4[0] B3 FO chip select to LCD device, programmable polarity; 5 V tolerant GPIO pin LD0/P4[4] C2 FO data bus to/from LCD (I/O) or 5 V tolerant GPIO pins LD1/P4[5] C1 FO LD2/P4[6] C3 FO LD3/P4[7] D2 FO LD4/P4[8] D1 FO LD5/P4[9] D3 FO LD6/P4[10] E2 FO LD7/P4[11] E3 FO LER/P4[3] F2 FO 6800 E or 8080 RD or 5 V tolerant GPIO pin LRS/P4[1] F3 FO ‘HIGH’ data register select, ‘LOW’ instruction register select, or 5 V tolerant GPIO pin LRW/P4[2] G2 FO 6800 W/R or 8080 WR or 5 V tolerant GPIO pin Table 4. Pin description …continued Symbol Ball # Type[1] Description |
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Similar Description - LPC2880 |
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