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XRP7740ILBTR-AAAA-F Datasheet(PDF) 8 Page - Exar Corporation |
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XRP7740ILBTR-AAAA-F Datasheet(HTML) 8 Page - Exar Corporation |
8 / 31 page XRP7740 REV 1.1.0 Quad-Output Digital PWM Buck Controller 3,4,5,6 GPIO0-GPIO3 These pins can be configured as inputs or outputs to implement custom flags, power good signals and enable/disable controls. A GPIO pin can also be programmed as an input clock synchronizing IC to external clock. Refer to the “GPIO Pins” Section and the “External Clock Synchronization” Section for more information. 7,8 GPIO4_SDA, GPIO5_SCL I 2C serial interface communication pins. These pins can be re-programmed to perform GPIO functions in applications when I 2C bus is not used. 12,13, 14,15 VOUT1- VOUT4 Voltage sense. Connect to the output of the corresponding power stage. 40 LDOOUT Output of the Standby LDO. It can be configured as a 5V or 3.3V output. A compensation capacitor should be used on this pin [see Application Note]. 9 ENABLE If ENABLE is pulled high, the chip powers up (logic reset, registers configuration loaded, etc.). If pulled low for longer than 100us, the XRP7740 is placed into shutdown. Exposed PAD AGND Analog Ground. Connect to analog ground (as noted above for pin 11). EXAR RESERVES THE RIGHT TO MAKE CHANGES TO THIS DATASHEET. EXAR CONFIDENTIAL, PRELIMINARY & PROPRIETARY. DO NOT DISTRIBUTE OR COPY. 8 |
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