P89LPC9241 datasheet(10/74 Pages) NXP

Part #	P89LPC9241

Description	8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB 3 V byte-erasable flash with 8-bit ADC

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Manufacturer	NXP [NXP Semiconductors]

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10 / 74 page

P89LPC92X1_1

Preliminary data sheet

Rev. 01 — 16 April 2009

10 of 74

NXP Semiconductors

P89LPC9201/9211/922A1/9241/9251

8-bit microcontroller with 8-bit ADC

P0.6/CMP1/KBI6

14

I/O

P0.6 — Port 0 bit 6. High current source.

O

CMP1 — Comparator 1 output.

I

KBI6 — Keyboard input 6.

P0.7/T1/KBI7

13

I/O

P0.7 — Port 0 bit 7. High current source.

I/O

T1 — Timer/counter 1 external count input or overﬂow output.

I

KBI7 — Keyboard input 7.

P1.0 to P1.7

I/O, I

[1]

Port 1: Port 1 is an 8-bit I/O port with a user-conﬁgurable output type, except for

three pins as noted below. During reset Port 1 latches are conﬁgured in the input

only mode with the internal pull-up disabled. The operation of the conﬁgurable

Port 1 pins as inputs and outputs depends upon the port conﬁguration selected.

Each of the conﬁgurable port pins are programmed independently. Refer to

Section 7.16.1 “Port conﬁgurations” and Table 12 “Static characteristics” for

details. P1.2 to P1.3 are open drain when used as outputs. P1.5 is input only.

All pins have Schmitt trigger inputs.

Port 1 also provides various special functions as described below:

P1.0/TXD

12

I/O

P1.0 — Port 1 bit 0.

O

TXD — Transmitter output for serial port.

P1.1/RXD

11

I/O

P1.1 — Port 1 bit 1.

I

RXD — Receiver input for serial port.

P1.2/T0/SCL

10

I/O

P1.2 — Port 1 bit 2 (open-drain when used as output).

I/O

T0 — Timer/counter 0 external count input or overﬂow output (open-drain when

used as output).

I/O

SCL — I2C-bus serial clock input/output.

P1.3/INT0/SDA

9

I/O

P1.3 — Port 1 bit 3 (open-drain when used as output).

I

INT0 — External interrupt 0 input.

I/O

SDA — I2C-bus serial data input/output.

P1.4/INT1

8

I/O

P1.4 — Port 1 bit 4. High current source.

I

INT1 — External interrupt 1 input.

P1.5/RST

4

I

P1.5 — Port 1 bit 5 (input only).

I

RST — External Reset input during power-on or if selected via UCFG1. When

functioning as a reset input, a LOW on this pin resets the microcontroller, causing

I/O ports and peripherals to take on their default states, and the processor begins

execution at address 0. Also used during a power-on sequence to force ISP mode.

P1.6

3

I/O

P1.6 — Port 1 bit 6. High current source.

P1.7

2

I/O

P1.7 — Port 1 bit 7. High current source.

P3.0 to P3.1

I/O

Port 3: Port 3 is a 2-bit I/O port with a user-conﬁgurable output type. During reset

Port 3 latches are conﬁgured in the input only mode with the internal pull-up

disabled. The operation of Port 3 pins as inputs and outputs depends upon the

port conﬁguration selected. Each port pin is conﬁgured independently. Refer to

Section 7.16.1 “Port conﬁgurations” and Table 12 “Static characteristics” for

details.

All pins have Schmitt trigger inputs.

Port 3 also provides various special functions as described below:

Table 3.

Pin description …continued

Symbol

Type Description

TSSOP20,

DIP20

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