P89LPC9103 datasheet(11/61 Pages) NXP

Part #	P89LPC9103

Description	8-bit microcontrollers with two-clock accelerated 80C51 core 1 kB 3 V byte-erasable flash with 8-bit A/D converter

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Manufacturer	NXP [NXP Semiconductors]

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P89LPC9102_9103_9107_3

Product data sheet

Rev. 03 — 10 July 2007

11 of 61

NXP Semiconductors

P89LPC9102/9103/9107

8-bit microcontrollers with two-clock accelerated 80C51 core

P1.5/RST

2

I

P1.5 — Port 1 bit 5 (input-only).

I

RST — External Reset input during power-on or if selected via User Conﬁguration

Register 1 (UCFG1). When functioning as a reset input a LOW on this pin resets the

microcontroller, causing I/O ports and peripherals to take on their default states, and

the processor begins execution at address 0. When using an oscillator frequency

above 12 MHz, the reset input function of P1.5 must be enabled. An external

circuit is required to hold the device in reset at power-up until VDD has reached

its speciﬁed level. When system power is removed VDD will fall below the

minimum speciﬁed operating voltage. When using an oscillator frequency

above 12 MHz, in some applications, an external brownout detect circuit may

be required to hold the device in reset when VDD falls below the minimum

speciﬁed operating voltage.

VSS

3I

Ground: 0 V reference.

VDD

7I

Power supply: This is the power supply voltage for normal operation as well as Idle

mode and Power-down mode.

Table 4.

P89LPC9102 pin description …continued

Symbol

Type

Description

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