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MC9RS08KA2 Datasheet(PDF) 11 Page - Freescale Semiconductor, Inc |
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MC9RS08KA2 Datasheet(HTML) 11 Page - Freescale Semiconductor, Inc |
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11 / 136 page  MC9RS08KA2 Series Data Sheet, Rev. 4 Freescale Semiconductor 11 Section Number Title Page 7.1.3 Block Diagram ................................................................................................................52 7.2 External Signal Description ............................................................................................................52 7.3 Register Definition ..........................................................................................................................53 7.3.1 KBI Status and Control Register (KBISC) .....................................................................53 7.3.2 KBI Pin Enable Register (KBIPE) .................................................................................54 7.3.3 KBI Edge Select Register (KBIES) ................................................................................54 7.4 Functional Description ....................................................................................................................55 7.4.1 Edge Only Sensitivity .....................................................................................................55 7.4.2 Edge and Level Sensitivity .............................................................................................55 7.4.3 KBI Pullup/Pulldown Device .........................................................................................55 7.4.4 KBI Initialization ............................................................................................................55 Chapter 8 Central Processor Unit (RS08CPUV1) 8.1 Introduction .....................................................................................................................................57 8.2 Programmer’s Model and CPU Registers .......................................................................................57 8.2.1 Accumulator (A) .............................................................................................................58 8.2.2 Program Counter (PC) ....................................................................................................59 8.2.3 Shadow Program Counter (SPC) ....................................................................................59 8.2.4 Condition Code Register (CCR) .....................................................................................59 8.2.5 Indexed Data Register (D[X]) ........................................................................................60 8.2.6 Index Register (X) ..........................................................................................................60 8.2.7 Page Select Register (PAGESEL) ..................................................................................61 8.3 Addressing Modes ...........................................................................................................................61 8.3.1 Inherent Addressing Mode (INH) ..................................................................................61 8.3.2 Relative Addressing Mode (REL) ..................................................................................61 8.3.3 Immediate Addressing Mode (IMM) .............................................................................62 8.3.4 Tiny Addressing Mode (TNY) .......................................................................................62 8.3.5 Short Addressing Mode (SRT) .......................................................................................63 8.3.6 Direct Addressing Mode (DIR) ......................................................................................63 8.3.7 Extended Addressing Mode (EXT) ................................................................................63 8.3.8 Indexed Addressing Mode (IX, Implemented by Pseudo Instructions) .........................63 8.4 Special Operations ...........................................................................................................................63 8.4.1 Reset Sequence ...............................................................................................................64 8.4.2 Interrupts .........................................................................................................................64 8.4.3 Wait and Stop Mode .......................................................................................................64 8.4.4 Active Background Mode ...............................................................................................64 8.5 Summary Instruction Table .............................................................................................................65 |
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