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MC9RS08KB12CDC Datasheet(PDF) 1 Page - Freescale Semiconductor, Inc |
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MC9RS08KB12CDC Datasheet(HTML) 1 Page - Freescale Semiconductor, Inc |
1 / 48 page Freescale Semiconductor Data Sheet: Technical Data Document Number: MC9RS08KB12 Rev. 3, 8/2009 © Freescale Semiconductor, Inc., 2008-2009. All rights reserved. This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. MC9RS08KB12 • 8-Bit RS08 Central Processor Unit (CPU) – Up to 20 MHz CPU at 1.8 V to 5.5 V across temperature range of –40 °C to 85 °C – Subset of HC08 instruction set with added BGND instruction – Single Global interrupt vector •On-Chip Memory – Up to 12 KB flash read/program/erase over full operating voltage and temperature, 12 KB/8 KB/4 KB/2 KB flash are optional – Up to 254-byte random-access memory (RAM), 254-byte/126-byte RAM are optional – Security circuitry to prevent unauthorized access to flash contents • Power-Saving Modes – Wait mode — CPU shuts down; system clocks continue to run; full voltage regulation – Stop mode — CPU shuts down; system clocks are stopped; voltage regulator in standby – Wakeup from power-saving modes using RTI, KBI, ADC, ACMP, SCI and LVD • Clock Source Options – Oscillator (XOSC) — Loop-control Pierce oscillator; crystal or ceramic resonator range of 31.25 kHz to 39.0625 kHz or 1 MHz to 16 MHz – Internal Clock Source (ICS) — Internal clock source module containing a frequency-locked-loop (FLL) controlled by internal or external reference; precision trimming of internal reference allows 0.2% resolution and 2% deviation over temperature and voltage; supporting bus frequencies up to 10 MHz • System Protection – Watchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz internal low power oscillator – Low-voltage detection with reset or interrupt – Illegal opcode detection with reset – Illegal address detection with reset – Flash-block protection • Development Support – Single-wire background debug interface – Breakpoint capability to allow single breakpoint setting during in-circuit debugging • Peripherals – ADC — 12-channel, 10-bit resolution; 2.5 μs conversion time; automatic compare function; 1 .7 mV/ °C temperature sensor; internal bandgap reference channel; operation in stop; hardware trigger; fully functional from 2.7 V to 5.5 V – ACMP — Analog comparator; full rail-to-rail supply operation; option to compare to fixed internal bandgap reference voltage; can operate in stop mode – TPM — One 2-channel timer/pulse-width modulator module; selectable input capture, output compare, or buffered edge- or center-aligned PWM on each channel – IIC — Inter-integrated circuit bus module capable of operation up to 100 kbps with maximum bus loading; capable of higher baud rates with reduced loading – SCI — One serial communications interface module with optional 13-bit break; LIN extensions – MTIM — Two 8-bit modulo timers; optional clock sources – RTI — One real-time clock with optional clock sources – KBI — Keyboard interrupts; up to 8 ports • Input/Output – 18 GPIOs in 20-pin package; 14 GPIOs in 16-pin package; 6 GPIOs in 8-pin package; including one output-only pin and one input-only pin – Hysteresis and configurable pullup device on all input pins; configurable slew rate and drive strength on all output pins • Package Options – MC9RS08KB12/MC9RS08KB8/MC9RS08KB4 — 20-pin SOIC, 16-pin SOIC NB or TSSOP – MC9RS08KB2 — 8-pin SOIC or DFN MC9RS08KB12 Series Covers:MC9RS08KB12 MC9RS08KB8 MC9RS08KB4 MC9RS08KB2 16-Pin TSSOP Case 948F 20-Pin SOIC Case 751D 16-Pin SOIC N/B Case 751B 8-Pin SOIC Case 751 8-Pin DFN Case 1452-02 |
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