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MC9S08QA2CFQEE Datasheet(PDF) 4 Page - Freescale Semiconductor, Inc |
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MC9S08QA2CFQEE Datasheet(HTML) 4 Page - Freescale Semiconductor, Inc |
4 / 32 page MC9S08QA4 Series MCU Data Sheet, Rev. 3 Pin Assignments Freescale Semiconductor 4 Figure 2. MC9S08QA4 Series in 8-Pin Packages Table 1. Pin Sharing Priority PIN Priority 8-Pin Port Pin Alt 1Alt 2Alt 3Alt 4 1PTA51 1 Pin does not contain a clamp diode to V DD and must not be driven above VDD. The voltage measured on the internally pulled-up RESET pin will not be pulled to VDD. The internal gates connected to this pin are pulled to VDD. IRQ TCLK RESET 2 PTA4 ACMPO BKGD MS 3 VDD 4 VSS 5 PTA3 KBIP3 ADP3 6 PTA2 KBIP2 ADP2 7 PTA1 KBIP1 ADP12 2 If ACMP and ADC are both enabled, both will have access to the pin. ACMP–2 8 PTA0 KBIP0 TPMCH0 ADP02 ACMP+2 Lowest Highest 8-Pin PDIP/SOIC 1 2 3 4 8 7 6 5 8-Pin DFN 1 2 3 4 8 7 6 5 PTA0/KBIP0/TPMCH0/ADP0/ACMP+ PTA1/KBIP1/ADP1/ACMP– PTA2/KBIP2/ADP2 PTA3/KBIP3/ADP3 VSS VDD PTA4/ACMPO/BKGD/MS PTA5/IRQ/TCLK/RESET PTA0/KBIP0/TPMCH0/ADP0/ACMP+ PTA1/KBIP1/ADP1/ACMP– PTA2/KBIP2/ADP2 PTA3/KBIP3/ADP3 VSS VDD PTA4/ACMPO/BKGD/MS PTA5/IRQ/TCLK/RESET |
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