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PCA9500D Datasheet(PDF) 2 Page - NXP Semiconductors |
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PCA9500D Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 26 page PCA9500_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 15 April 2009 2 of 26 NXP Semiconductors PCA9500 8-bit I2C-bus and SMBus I/O port with 2-kbit EEPROM I 5 V tolerant inputs/outputs I 0 Hz to 400 kHz clock frequency I ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 I Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA I Packages offered: SO16, TSSOP16, HVQFN16 3. Applications I Board version tracking and configuration I Board health monitoring and status reporting I Multi-card systems in telecommunications, networking, and base station infrastructure equipment I Field recall and troubleshooting functions for installed boards I General-purpose integrated I/O with memory I Drop-in replacement for PCF8574 with integrated 2-kbit EEPROM I Bus master sees GPIO and EEPROM as two separate devices I Three hardware address pins allow up to 8 PCA9500s to be located in the same I2C-bus/SMBus 4. Ordering information 4.1 Ordering options Table 1. Ordering information Type number Package Name Description Version PCA9500D SO16 plastic small outline package; 16 leads; body width 7.5 mm SOT162-1 PCA9500PW TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 PCA9500BS HVQFN16 plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 4 × 4 × 0.85 mm SOT629-1 Table 2. Ordering options Type number Topside mark Temperature range PCA9500D PCA9500D −40 °C to +85 °C PCA9500PW PCA9500 −40 °C to +85 °C PCA9500BS 9500 −40 °C to +85 °C |
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