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MCIMX356AVM4B Datasheet(PDF) 9 Page - Freescale Semiconductor, Inc |
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MCIMX356AVM4B Datasheet(HTML) 9 Page - Freescale Semiconductor, Inc |
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9 / 148 page  i.MX35 Applications Processors for Automotive Products, Rev. 8 Freescale Semiconductor 9 ESAI Enhanced serial audio interface SDMA Connectivity peripherals The enhanced serial audio interface (ESAI) provides a full-duplex serial port for serial communication with a variety of serial devices, including industry-standard codecs, SPDIF transceivers, and other DSPs. The ESAI consists of independent transmitter and receiver sections, each section with its own clock generator. eSDHCv2 (3) Enhanced secure digital host controller ARM Connectivity peripherals The eSDHCv2 consists of four main modules: CE-ATA, MMC, SD and SDIO. CE-ATA is a hard drive interface that is optimized for embedded applications of storage. The MultiMediaCard (MMC) is a universal, low-cost, data storage and communication media to applications such as electronic toys, organizers, PDAs, and smart phones. The secure digital (SD) card is an evolution of MMC and is specifically designed to meet the security, capacity, performance, and environment requirements inherent in emerging audio and video consumer electronic devices. SD cards are categorized into Memory and I/O. A memory card enables a copyright protection mechanism that complies with the SDMI security standard. SDIO cards provide high-speed data I/O (such as wireless LAN via SDIO interface) with low power consumption. Note: CE-ATA is not available for the MCIMX351. FEC Ethernet SDMA Connectivity peripherals The Ethernet media access controller (MAC) is designed to support both 10 and 100 Mbps Ethernet/IEEE 802.3 networks. An external transceiver interface and transceiver function are required to complete the interface to the media GPIO(3) General purpose I/O modules ARM Pins Used for general purpose input/output to external ICs. Each GPIO module supports 32 bits of I/O. GPT General purpose timers ARM Timer peripherals Each GPT is a 32-bit free-running or set-and-forget mode timer with a programmable prescaler and compare and capture registers. A timer counter value can be captured using an external event and can be configured to trigger a capture event on either the leading or trailing edges of an input pulse. When the timer is configured to operate in set-and-forget mode, it is capable of providing precise interrupts at regular intervals with minimal processor intervention. The counter has output compare logic to provide the status and interrupt at comparison. This timer can be configured to run either on an external clock or on an internal clock. GPU2D Graphics processing unit 2Dv1 ARM Multimedia peripherals This module accelerates OpenVG and GDI graphics. Note: Not available for the MCIMX351. Table 4. Digital and Analog Modules (continued) Block Mnemonic Block Name Domain1 Subsystem Brief Description |
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