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PCA9534BS3 Datasheet(PDF) 10 Page - NXP Semiconductors |
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PCA9534BS3 Datasheet(HTML) 10 Page - NXP Semiconductors |
10 / 25 page PCA9534_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 6 November 2006 10 of 25 NXP Semiconductors PCA9534 8-bit I2C-bus and SMBus low power I/O port with interrupt 7. Application design-in information 7.1 Minimizing IDD when the I/O us used to control LEDs When the I/Os are used to control LEDs, they are normally connected to VDD through a resistor as shown in Figure 12. Since the LED acts as a diode, when the LED is off the I/O VI is about 1.2 V less than VDD. The supply current, IDD, increases as VI becomes lower than VDD. Designs needing to minimize current consumption, such as battery power applications, should consider maintaining the IOn pins greater than or equal to VDD when the LED is off. Figure 13 shows a high value resistor in parallel with the LED. Figure 14 shows VDD less than the LED supply voltage by at least 1.2 V. Both of these methods maintain the I/O VI at or above VDD and prevents additional supply current consumption when the LED is off. Device address configured as 0100 100X for this example. IO0, IO1, IO2 configured as outputs. IO3, IO4, IO5 configured as inputs. IO6, IO7 are not used and must be configured as outputs. Fig 12. Typical application PCA9534 IO0 IO1 SCL SDA VDD 002aac476 SCL SDA IO2 IO3 VDD VSS MASTER CONTROLLER VSS VDD (5 V) 2 k Ω SUBSYSTEM 1 (e.g., temp. sensor) INT SUBSYSTEM 2 (e.g., counter) RESET controlled switch (e.g., CBT device) A B enable INT 5 V INT 10 k Ω 10 k Ω SUBSYSTEM 3 (e.g., alarm system) ALARM IO4 IO5 VDD A2 A1 A0 IO6 IO7 100 k Ω ( × 3) 10 k Ω 10 k Ω |
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