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PCA9540BGD Datasheet(PDF) 8 Page - NXP Semiconductors |
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PCA9540BGD Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 22 page  PCA9540B_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 3 September 2009 8 of 22 NXP Semiconductors PCA9540B 2-channel I2C-bus multiplexer 7.5 Bus transactions 8. Application design-in information Fig 12. Write control register Fig 13. Read control register 002aae719 1 1 0 0 0 0 0 A S 1 A P slave address START condition R/W acknowledge from slave acknowledge from slave control register SDA STOP condition XXXXX B2 B1 B0 002aae720 XXXXX B2 B1 B0 1 1 0 0 0 0 1 A S 1 NA P slave address START condition R/W acknowledge from slave no acknowledge from master control register SDA STOP condition last byte Fig 14. Typical application PCA9540B SD0 SC0 VSS SDA SCL VDD = 3.3 V VDD = 2.7 V to 5.5 V I2C-bus/SMBus master 002aae721 SDA SCL channel 0 V = 2.7 V to 5.5 V SD1 SC1 channel 1 V = 2.7 V to 5.5 V |
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