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PH5330E Datasheet(PDF) 1 Page - NXP Semiconductors |
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PH5330E Datasheet(HTML) 1 Page - NXP Semiconductors |
1 / 12 page PH5330E N-channel TrenchMOS logic level FET Rev. 02 — 19 October 2009 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only. 1.2 Features and benefits Higher operating power due to low thermal resistance Low conduction losses due to low on-state resistance Suitable for logic level gate drive sources 1.3 Applications DC-to-DC convertors Notebook computers Portable equipment Switched-mode power supplies 1.4 Quick reference data Table 1. Quick reference Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C - - 30 V ID drain current Tmb =25°C; VGS =10V; see Figure 1 and 3 --80 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - - 62.5 W Dynamic characteristics QGD gate-drain charge VGS =5V; ID =20 A; VDS =10V; Tj =25°C; see Figure 11 -6 -nC Static characteristics RDSon drain-source on-state resistance VGS =10V; ID =15 A; Tj = 25 °C; see Figure 9 and 10 -4.8 5.7 m Ω |
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