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PHP36N03LT Datasheet(PDF) 3 Page - NXP Semiconductors |
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PHP36N03LT Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 13 page PHP36N03LT_3 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 03 — 29 March 2010 3 of 13 NXP Semiconductors PHP36N03LT N-channel TrenchMOS logic level FET Fig 1. Normalized continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage Tmb (°C) 0 200 150 50 100 03aa24 40 80 120 Ider (%) 0 Tmb (°C) 0 200 150 50 100 03aa16 40 80 120 Pder (%) 0 001aae811 VDS (V) 1 102 10 102 10 103 ID (A) 1 Limit RDSon = VDS / ID tp = 10 μs 100 μs 1 ms DC |
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