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PHP45NQ11T Datasheet(PDF) 3 Page - NXP Semiconductors |
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PHP45NQ11T Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 12 page PHP45NQ11T_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 19 November 2009 3 of 12 NXP Semiconductors PHP45NQ11T N-channel TrenchMOS standard level FET 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 105 V VDGR drain-gate voltage Tj ≤ 175 °C; Tj ≥ 25 °C; RGS =20kΩ -105 V VGS gate-source voltage -20 20 V ID drain current VGS =10V; Tmb = 100 °C; see Figure 1 -33 A VGS =10V; Tmb =25°C; see Figure 1 and 3 -47 A IDM peak drain current tp ≤ 10 µs; pulsed; Tmb =25°C; see Figure 3 -188 A Ptot total power dissipation Tmb =25°C; see Figure 2 -150 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Source-drain diode IS source current Tmb =25°C - 47 A ISM peak source current tp ≤ 10 µs; pulsed; Tmb =25°C - 188 A Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy VGS =10V; Tj(init) =25°C; ID =18A; Vsup ≤ 100 V; RGS =50 Ω; tp = 120 µs; unclamped -160 mJ Fig 1. Normalized continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature Tmb (°C) 0 200 150 50 100 03aa24 40 80 120 Ider (%) 0 Tmb (°C) 0 200 150 50 100 03aa16 40 80 120 Pder (%) 0 |
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