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TMS320C5514AZCH10 Datasheet(PDF) 4 Page - Texas Instruments |
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TMS320C5514AZCH10 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 144 page PLL/Clock Generator Power Management Pin Multiplexing JTAG Interface C55x™ DSP CPU 64 KB DARAM 192 KB SARAM 128 KB ROM Switched Central Resource (SCR) I S (x4) 2 I C 2 SPI UART Serial Interfaces USB 2.0 PHY (HS) [DEVICE] Connectivity Peripherals Input Clock(s) DMA (x4) Interconnect DSP System System NAND, NOR, SRAM, mSDRAM Program/Data Storage MMC/SD (x2) GP Timer (x2) RTC GP Timer or WD LDOs TMS320C5514 SPRS646A – JANUARY 2010 – REVISED MARCH 2010 www.ti.com 1.3 Functional Block Diagram Figure 1-1 shows the functional block diagram of the device. Figure 1-1. Functional Block Diagram 4 Fixed-Point Digital Signal Processor Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320C5514 |
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