DDR SDRAM

General Information

December 2007

3 : DIMM

4 : SODIMM

68 : x64 184pin Unbuffered DIMM

81 : x72 184pin ECC unbuffered DIMM

83 : x72 184pin Registered DIMM

12 : x72 184pin Low Profile Registered DIMM

70 : x64 200pin Unbuffered SODIMM

63 : x64 172pin Micro DIMM

T

TSOP II (400mil)

N

sTSOP

G

FBGA

16 : 16M

17 : 16M (for 128Mb/512Mb)

32 : 32M

33 : 32M (for 128Mb/512Mb)

64 : 64M

65 : 64M (for 128Mb/512Mb)

28 : 128M

29 : 128M (for 128Mb/512Mb)

56 : 256M

57 : 256M (for 512Mb)

51 : 512M

1stGen.

3rdGen.

5thGen.

7thGen.

9thGen.

0

: Mother PCB

2

: 2nd Rev.

S

: Reduced layer PCB

L : DDR SDRAM (2.5V VDD)

1. Memory Module : M

2. DIMM Configuration

3. Data Bits

4. Feature

5. Depth

12. Speed

11. Temp & Power

10. PCB Revision & Type

9. Package

8. Component Revision

Composition Component

PCB revision & Type

Component Revision

Refresh, # of Banks in Comp. & Interface

Depth

Feature

Data bits

DIMM Configuration

Memory Module

Package

Power

Speed

0 : x 4

3 : x 8

4 : x16

8 : x 4 Stack

9 : x 8 Stack

M X X X L X X X X X X X - X X X

7. Composition Component

1

2

3

4

5

6

7

8

9

10

11

12

1 :

4K/ 64ms Ref., 4Banks & SSTL-2

2 :

8K/ 64ms Ref., 4Banks & SSTL-2

6. Refresh, # of Banks in comp. & Interface

M

B

D

F

H

:

:

:

:

:

:

:

:

1 : 1st Rev.

3 : 3rd Rev.

: DDR400 (200MHz @ CL=3,

tRCD=3, tRP=3)

: DDR333 (166MHz @ CL=2.5, tRCD=3, tRP=3)

: DDR266 (133MHz @ CL=2 , tRCD=3, tRP=3)

: DDR266 (133MHz @ CL=2.5, tRCD=3, tRP=3)

CC

B3

A2

B0

C

L

: Commercial Temp.( 0

°C ~ 70°C) & Normal Power

: Commercial Temp.( 0

°C ~ 70°C) & Low Power

U

V

Z

(Note 1 : All of Lead-free product are in compliance with RoHS)

D. DDR SDRAM Module Ordering Information

2nd Gen.

4th Gen.

6th Gen.

8th Gen

11th Gen.

A

C

E

G

J

:

:

:

:

: