SN74AUP1T02DCKR datasheet(2/11 Pages) TI

Part #	SN74AUP1T02DCKR

Description	LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT,SINGLE 2-INPUT POSITIVE-NOR GATE

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Manufacturer	TI [Texas Instruments]

Direct Link	http://www.ti.com

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1

2

4

A

B

Y

AUP

LVC

AUP

LVC

Static-Power Consumption

(

µA)

Dynamic-Power Consumption

(pF)

† Single, dual, and triple gates

3.3-V

Logic†

3.3-V

Logic†

0%

20%

40%

60%

80%

100%

0%

20%

40%

60%

80%

100%

−0.5

0

0.5

1

1.5

2

2.5

3

3.5

0

5

10

15

20

25

30

35

40

45

Time − ns

† AUP1G08 data at C

L = 15 pF

Switching Characteristics

at 25 MHz†

Output

Input

SN74AUP1T02

SCES799 – APRIL 2010

www.ti.com

ORDERING INFORMATION(1)

TA

PACKAGE(2)

ORDERABLE PART NUMBER

TOP-SIDE MARKING(3)

Reel of 3000

SN74AUP1T02DCKR

–40°C to 85°C

SOT (SC-70) – DCK

6B_

Reel of 250

SN74AUP1T02DCKT

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2)

Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

(3)

The actual top-side marking has one additional character that designates the wafer fab/assembly site.

FUNCTION TABLE

INPUTS

OUTPUT

(Lower Level Input)

(VCC CMOS)

A

B

Y

H

X

L

X

H

L

H

Supply VCC = 2.3 V to 2.7 V (2.5 V)

INPUTS

OUTPUT

VT+ max = VIH min

CMOS

VT- min = VIL max

A

B

Y

VIH = 1.1 V

VOH = 1.85 V

VIL = 0.35 V

VOL = 0.45 V

Supply VCC = 3 V to 3.6 V (3.3 V)

INPUTS

OUTPUT

VT+ max = VIH min

CMOS

VT- min = VIL max

A

B

Y

VIH = 1.19 V

VOH = 2.55 V

VIL = 0.5 V

VOL = 0.45 V

LOGIC DIAGRAM (NOR GATE)

Figure 1. AUP – The Lowest-Power Family

Figure 2. Excellent Signal Integrity

2

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