RS-485 Transceivers with Low-Voltage

Logic Interface

10

______________________________________________________________________________________

R

B

A

RECEIVER

OUTPUT

ATE

Figure 6. Receiver Propagation Delay Test Circuit

A

B

RO

+1V

-1V

THE RISE TIME AND FALL TIME OF INPUTS A AND B < 4ns

Figure 7. Receiver Propagation Delays

Test Circuits and Waveforms (continued)

S1 OPEN

S2 CLOSED

S3 = +1.5V

RO

0

0

S1 OPEN

S2 CLOSED

S3 = +1.5V

0

0

0.25V

S1 CLOSED

S2 OPEN

S3 = -1.5V

0

S1 CLOSED

S2 OPEN

S3 = -1.5V

0

0.25V

GENERATOR

+1.5V

1k

Ω

15pF

S2

S1

50

Ω

S3

-1.5V

R

RE

RO

RE

RO

RE

RO

RE

R

RO

RE

Figure 8. Receiver Enable and Disable Times