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MCIMX31C Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc

Part # MCIMX31C
Description  Multimedia Applications Processors for Industrial and Automotive Products
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MCIMX31C Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc

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MCIMX31C/MCIMX31LC Technical Data, Rev. 4.3
10
Freescale Semiconductor
Electrical Characteristics
CAUTION
Stresses beyond those listed under Table 5, "Absolute Maximum Ratings,"
on page 10 may cause permanent damage to the device. These are stress
ratings only. Functional operation of the device at these or any other
conditions beyond those indicated under Table 7, "Operating Ranges," on
page 12 is not implied. Exposure to absolute-maximum-rated conditions for
extended periods may affect device reliability.
Table 6 provides the thermal resistance data for the 19
× 19 mm, 0.8 mm pitch package.
Table 4. MCIMX31C Chip-Level Conditions
For these characteristics, …
Topic appears …
Table 5, “Absolute Maximum Ratings”
on page 10
Table 6, “Thermal Resistance Data—19
× 19 mm Package”
on page 10
Table 7, “Operating Ranges”
on page 12
Table 8, “Specific Operating Ranges for Silicon Revision 2.0 and 2.0.1”
on page 12
Table 9, “Interface Frequency”
on page 13
Section 4.1.1, “Supply Current Specifications”
on page 14
Section 4.2, “Supply Power-Up/Power-Down Requirements and Restrictions”
on page 15
Table 5. Absolute Maximum Ratings
Parameter
Symbol
Min
Max
Units
Supply Voltage (Core)
QVCCmax
–0.5
1.47
V
Supply Voltage (I/O)
NVCCmax
–0.5
3.1
V
Input Voltage Range
VImax
–0.5
NVCC +0.3
V
Storage Temperature
Tstorage
–40
125
oC
ESD Damage Immunity:
Vesd
V
Human Body Model (HBM)
H1C1
1 HBM ESD classification level according to the AEC-Q100-002-Rev-D standard.
Machine Model (MM)
200
Charge Device Model (CDM)
C22
2 Integrated circuit CDM ESD classification level according to the AEC-Q100-011-Rev-B standard.
Offset voltage allowed in run mode between core supplies.
Vcore_offset
3
3 The offset is the difference between all core voltage pair combinations of QVCC, QVCC1, and QVCC4.
—15
mV
Table 6. Thermal Resistance Data—19
× 19 mm Package
Rating
Board
Symbol
Value
Unit
Notes
Junction to Ambient (natural convection)
Single layer board (1s)
RθJA
46
°C/W
1, 2, 3
Junction to Ambient (natural convection)
Four layer board (2s2p)
RθJA
29
°C/W
1, 2, 3
Junction to Ambient (@200 ft/min)
Single layer board (1s)
RθJMA
38
°C/W
1, 2, 3


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