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PPC5125YVN400 Datasheet(PDF) 1 Page - Freescale Semiconductor, Inc |
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PPC5125YVN400 Datasheet(HTML) 1 Page - Freescale Semiconductor, Inc |
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1 / 92 page  Freescale Semiconductor Data Sheet: Technical Data Document Number: MPC5125 Rev. 3, 11/2009 © Freescale Semiconductor, Inc., 2008–2009. All rights reserved. This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. MPC5125 324 TEPBGA 23 mm x 23 mm The MPC5125 integrates a high performance e300 CPU core based on the Power Architecture™ Technology with a rich set of peripheral functions focused on communications and systems integration. Major features of the MPC5125 are as follows: • e300 Power Architecture processor core (enhanced version of the MPC603e core), operates as fast as 400 MHz • Low power design • Display interface unit (DIU) • DDR1, DDR2, low-power mobile DDR (LPDDR), and 1.8 V/3.3 V SDR DRAM memory controllers • 32 KB on-chip SRAM • USB 2.0 OTG controller with ULPI interface • DMA subsystem • Flexible multi-function external memory bus (EMB) interface • NAND flash controller (NFC) • LocalPlus interface (LPC) • 10/100Base Ethernet • MMC/SD/SDIO card host controller (SDHC) • Programmable serial controller (PSC) • Inter-integrated circuit (I2C) communication interfaces • Controller area network (CAN) • J1850 byte data link controller (BDLC) interface • On-chip real-time clock (RTC) • On-chip temperature sensor • IC Identification module (IIM) MPC5125 Microcontroller Data Sheet |
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