ISO7521CDW datasheet(6/15 Pages) TI

Part #	ISO7521CDW

Description	Low-Power 5 KV(rms) Dual Digital Isolators

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Manufacturer	TI [Texas Instruments]

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ISO7520

ISO7521

SLLSE39 – JUNE 2010

www.ti.com

ELECTRICAL CHARACTERISTICS

VCC1 at 3.3 V ± 5%, VCC2 at 5 V ± 5%, TA = –40°C to 105°C

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

ISO7520/7521 (5-V side)

VCC –0.8

4.6

IOH = –4 mA;

See Figure 1

VOH

High-level output voltage

ISO7521 (3.3-V side)

VCC –0.4

3

V

IOH = –20 µA; See Figure 1

VCC –0.1

VCC

IOL = 4 mA; See Figure 1

0.2

0.4

VOL

Low-level output voltage

V

IOL = 20 µA; See Figure 1

0

0.1

VI(HYS)

Input threshold voltage hysteresis

400

mV

IIH

High-level input current

10

µA

INx at 0 V or VCC

IIL

Low-level input current

–10

µA

CMTI

Common-mode transient immunity

VI = VCC or 0 V; See Figure 3

25

40

kV/µs

SUPPLY CURRENT (All inputs switching with square wave clock signal for dynamic ICC measurement)

ISO7520

ICC1

Supply current for VCC1

DC to 1 Mbps

VI = VCC or 0 V, 15 pF load

0.2

0.7

mA

ICC2

Supply current for VCC2

DC to 1 Mbps

VI = VCC or 0 V, 15 pF load

3

6

mA

ISO7521

ICC1

Supply current for VCC1

DC to 1 Mbps

VI = VCC or 0 V, 15 pF load

1.5

3.5

mA

ICC2

Supply current for VCC2

DC to 1 Mbps

VI = VCC or 0 V, 15 pF load

2

4

mA

SWITCHING CHARACTERISTICS

VCC1 at 3.3 V ± 5%, VCC2 at 5 V ± 5%, TA = –40°C to 105°C

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

tPLH, tPHL

Propagation delay time

See Figure 1

10

17

ns

PWD(1)

Pulse width distortion |tPHL – tPLH|

0.5

4

ns

tsk(pp)

Part-to-part skew time

5

ns

tsk(o)

Channel-to-channel output skew time

4

ns

tr

Output signal rise time

See Figure 1

2

ns

tf

Output signal fall time

2

ns

tfs

Fail-safe output delay time from input power loss

See Figure 2

6

ns

(1)

Also known as pulse skew.

6

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