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ISO7521CDWR Datasheet(PDF) 10 Page - Texas Instruments |
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ISO7521CDWR Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 15 page  ISO7520 ISO7521 SLLSE39 – JUNE 2010 www.ti.com INSULATION CHARACTERISTICS over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS SPECIFICATION UNIT VTEST = 1.875 × VIORM, PD ≤ 5pC, Vpeak/ VIORM Maximum working insulation voltage t = 10 sec (qualification) 1300/920 Vrms t = 1 sec (100% production) VTEST = VIOTM, Vpeak/ VIOTM Transient overvoltage t = 60 sec (qualification) 4000/2858 Vrms t= 1 sec (100% production) VTEST = VISO 7000/5000 Vpeak/ VISO Isolation voltage per UL t = 60 sec (qualification), VTEST = 1.2 × VISO, 8400/6000 Vrms t = 1 sec (100% production) RS Insulation resistance VTEST = 500 V at TS = 150C >109 Ω Pollution degree 2 REGULATORY INFORMATION VDE CSA UL Approved under CSA Component Acceptance Recognized under 1577 Component Certified according to IEC 60747-5-2 Notice Recognition Program File Number: pending File Number: pending File Number: pending IEC SAFETY LIMITING VALUES Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry. A failure of the IO can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system failures. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT qJA =79.9 °C/W, VI = 5.25 V, TJ = 150 °C, TA = 25 298 °C Is Safety input, output, or supply current mA qJA =79.9 °C/W, VI = 3.45 V, TJ = 150 °C, TA = 25 453 °C Ts Maximum Case Temperature 150 °C The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Characteristics table is that of a device installed on a High-K Test Board for Leaded Surface Mount Packages. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance. 10 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): ISO7520 ISO7521 |
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