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SN74LV8153PW Datasheet(PDF) 2 Page - Texas Instruments |
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SN74LV8153PW Datasheet(HTML) 2 Page - Texas Instruments |
2 / 16 page SN74LV8153 SERIALTOPARALLEL INTERFACE SCLS555 − JUNE 2004 www.ti.com 2 ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP − N Tube SN74LV8153N SN74LV8153N −40 °C to 85°C TSSOP − PW Tube SN74LV8153PW LV8153 −40 C to 85 C TSSOP − PW Tape and reel SN74LV8153PWR LV8153 (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. PIN DESCRIPTION PIN # PIN NAME I/O PIN FUNCTION 1 VCC1 Power-supply pin (all inputs and outputs except for Y0-Y7) 2-4 A0, A1, A2 In The address pins are used to program the address of the device and allow up to eight devices to share the same bus. 5 D In Serial data input 6 OUTSEL In Choose between open-collector and push-pull type outputs (Y0-Y7). 7 RESET In Initialize register status 8 OE In Force Y0-Y7 to Hi-Z 9 SOUT Out Outputs a pulse when latch data is changed. Supplied by VCC1. 12-19 Y0-Y7 Out Push-pull or open collector parallel data outputs. Supplied by VCC2. 20 VCC2 Power-supply pin for outputs (Y0-Y7). VCC2 can range from 3 V to 13.2 V. |
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