100 W

0V

PulseGenerator,

15 sDuration,

1%DutyCycle

m

15ms

15 s

m

DE

RE

8

D

5

6

7

R

V

CC

GND

1

4

3

2

A

B

7

6

DE

RE

1

D

4

3

2

R

B

A

SN65HVD3082E, SN75HVD3082E

SN65HVD3085E, SH65HVD3088E

www.ti.com

SLLS562G – AUGUST 2009 – REVISED MAY 2009

PARAMETER MEASUREMENT INFORMATION (continued)

Figure 13. Test Circuit and Waveforms, Transient Overvoltage Test

DEVICE INFORMATION

PIN ASSIGNMENT

LOGIC DIAGRAM (POSITIVE LOGIC)

D, P OR DGK PACKAGE

(TOP VIEW)

FUNCTION TABLE

DRIVER

RECEIVER

OUTPUTS

INPUT

INPUT

DIFFERENTIAL INPUTS

ENABLE

OUTPUT

D

DE

RE

R

A

B

H

H

H

L

L

L

L

H

L

H

L

?

X

L

Z

Z

–0.01 V

L

H

Open

H

H

L

X

H

Z

X

Open

Z

Z

Open circuit

L

H

Short circuit

L

H

IDLE Bus

L

H

X

Open

Z

Receiver Failsafe

The differential receiver is “failsafe” to invalid bus states caused by:

•

open bus conditions such as a disconnected connector,

•

shorted bus conditions such as cable damage shorting the twisted-pair together, or

•

idle bus conditions that occur when no driver on the bus is actively driving

In any of these cases, the differential receiver outputs a failsafe logic High state, so that the output of the

receiver is not indeterminate.

Copyright © 2009, Texas Instruments Incorporated

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