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TPD4E001 Datasheet(PDF) 2 Page - Texas Instruments |
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TPD4E001 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 14 page www.ti.com IO3 IO4 GND IO2 IO1 V CC Absolute Maximum Ratings (1) TPD4E001 LOW-CAPACITANCE 4-CHANNEL ±15-kV ESD PROTECTION ARRAY FOR HIGH-SPEED DATA INTERFACES SLLS682C – JULY 2006 – REVISED APRIL 2007 FUNCTIONAL BLOCK DIAGRAM PIN DESCRIPTION QFN/DRL NO. NAME FUNCTION 1, 2, 4, 5 IOx ESD-protected channel 3 GND Ground 6 VCC Power-supply input. Bypass VCC to GND with a 0.1-µF ceramic capacitor. EP EP Exposed pad. Connect to GND. over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC –0.3 7 V VI/O –0.3 VCC + 0.3 V Tstg Storage temperature range –65 150 °C TJ Junction temperature 150 °C Infrared (15 s) 220 Bump temperature (soldering) °C Vapor phase (60 s) 215 Lead temperature (soldering, 10 s) 300 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Link(s): TPD4E001 |
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