ADT7460 datasheet(5/46 Pages) ONSEMI

Part #	ADT7460

Description	dBCOOL Remote Thermal Monitor and Fan Controller

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Manufacturer	ONSEMI [ON Semiconductor]

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ADT7460

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ELECTRICAL CHARACTERISTICS TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted.

Parameter (Note 1)

Unit

Max

Typ (Note 2)

Min

Test Conditions/Comments

DIGITAL INPUT LOGIC LEVELS (THERM)

Input High Voltage, VIH

1.7

V

Input Low Voltage, VIL

0.8

V

DIGITAL INPUT CURRENT

Input High Current, IIH

VIN = VCC

−1.0

mA

Input Low Current, IIL

VIN = 0

+1.0

mA

Input Capacitance, CIN

5.0

pF

SERIAL BUS TIMING (Note 4)

Clock Frequency, fSCLK

See Figure 2

400

kHz

Glitch Immunity, tSW

50

ns

Bus Free Time, tBUF

See Figure 2

1.3

ms

Start Setup Time, tSU;STA

See Figure 2

0.6

ms

Start Hold Time, tHD;STA

See Figure 2

0.6

ms

SCL Low Time, tLOW

See Figure 2

1.3

ms

SCL High Time, tHIGH

See Figure 2

0.6

ms

SCL, SDA Rise Time, tR

See Figure 2

300

ns

SCL, SDA Fall Time, tF

See Figure 2

300

ms

Data Setup Time, tSU;DAT

See Figure 2

100

ns

Detect Clock Low Timeout, tTIMEOUT

Can be optionally disabled

15

35

ms

1. All voltages are measured with respect to GND, unless otherwise specified. Logic inputs accept input high voltages up to VMAX even when

the device is operating below VMIN. Timing specifications are tested at logic levels of VIL = 0.8 V for a falling edge and at VIH = 2.0 V for a

rising edge.

2. Typicals are at TA = 25°C and represent the most likely parametric norm.

3. The delay is the time between the round robin finishing one set of measurements and starting the next.

4. Guaranteed by design; not production tested

Figure 2. Serial Bus Timing Diagram

SCL

SDA

PS

SP

tBUF

tHD; STA

tHD; DAT

tSU; DAT

tF

tR

tLOW

tSU; STA

tHIGH

tHD; STA

tSU; STO

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