Electronic Components Datasheet Search |
|
ADT7461 Datasheet(PDF) 4 Page - ON Semiconductor |
|
ADT7461 Datasheet(HTML) 4 Page - ON Semiconductor |
4 / 20 page ADT7461 http://onsemi.com 4 ELECTRICAL CHARACTERISTICS TA = −40°C to +120°C, VDD = 3.0 V to 5.5 V, unless otherwise noted. Parameter Conditions Min Typ Max Unit Power Supply Supply Voltage, VDD 3.0 3.30 5.5 V Average Operating Supply Current, IDD 0.0625 Conversions/Sec Rate (Note 1) Standby mode, –40°C ≤ TA ≤ +85°C Standby mode, +85°C ≤ TA ≤ +120°C − 170 5.5 5.5 215 10 20 mA Undervoltage Lockout Threshold VDD input, disables ADC, rising edge 2.2 2.55 2.8 V Power-On-Reset Threshold 1.0 − 2.5 V Temperature-To-Digital Converter Local Sensor Accuracy −40°C ≤ TA ≤ +100°C, 3.0 V ≤ VDD ≤ 3.6 V − ±1.0 ±3.0 °C Resolution − 1.0 − °C Remote Diode Sensor Accuracy +60°C ≤ TA ≤ +100°C, −55°C ≤ TD (Note 2) ≤ +150°C, 3.0 V ≤ VDD ≤ 3.6 V −40°C ≤ TA ≤ +120°C, −55°C ≤ TD (Note 2) ≤ +150°C, 3.0 V ≤ VDD ≤ 5.5 V − − ±1.0 ±3.0 °C Resolution − 0.25 − °C Remote Sensor Source Current High level (Note 3) − 96 − mA Middle level (Note 3) − 36 − mA Low level (Note 3) − 6.0 − mA Conversion Time From stop bit to conversion complete (both channels), one-shot mode with averaging switched on 32.13 − 114.6 ms One-shot mode with averaging off (that is, conversion rate = 16, 32, or 64 conversions per second) 3.2 − 12.56 ms Maximum Series Resistance Cancelled Resistance split evenly on both the D+ and D– inputs − 3.0 − kW Open-Drain Digital Outputs (THERM, ALERT/THERM2) Output Low Voltage, VOL IOUT = −6.0 mA (Note 3) − − 0.4 V High Level Output Leakage Current, IOH VOUT = VDD (Note 3) − 0.1 1.0 mA ALERT Output Low Sink Current ALERT forced to 0.4 V 1.0 − − mA SMBus Interface (Note 3 and 4) Logic Input High Voltage, VIH SCLK, SDATA 3.0 V ≤ VDD ≤ 3.6 V 2.1 − − V Logic Input Low Voltage, VIL SCLK, SDATA 3.0 V ≤ VDD ≤ 3.6 V − − 0.8 V Hysteresis − 500 − mV SMBus Output Low Sink Current SDATA forced to 0.6 V 6.0 − − mA Logic Input Current, IIH, IIL −1.0 − +1.0 mA SMBus Input Capacitance, SCLK, SDATA − 5.0 − pF SMBus Clock Frequency − − 400 kHz SMBus Timeout (Note 5) User programmable − 25 64 ms SCLK Falling Edge to SDATA Valid Time Master clocking in data − − 1.0 ms 1. See Table 4 for information on other conversion rates. 2. Guaranteed by characterization, but not production tested. 3. Guaranteed by design, but not production tested. 4. See the SMBUS Timing Specifications section for more information. 5. Disabled by default; see the Serial Bus Interface section for details on enabling it. |
Similar Part No. - ADT7461 |
|
Similar Description - ADT7461 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |