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CAT812RTBI-GT3 Datasheet(PDF) 2 Page - ON Semiconductor |
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CAT812RTBI-GT3 Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 11 page CAT811, CAT812 PIN DESCRIPTION Pin Number Name Description CAT811 CAT812 1 1 GND Ground Active LOW reset. RESET ¯¯¯¯¯¯ is asserted if V 2 — RESET ¯¯¯¯¯¯ CC falls below the reset threshold and remains low for at least 140ms after VCC rises above the reset threshold. Active HIGH reset. RESET is asserted if VCC falls below the reset threshold and remains high for at least 140ms after V — 2 RESET CC rises above the reset threshold. Manual Reset Input. A logic LOW on MR ¯¯¯ asserts RESET. RESET remains active as long as MR ¯¯¯ is LOW and for 140ms after MR ¯¯¯ returns HIGH. The active low input has an internal 20kΩ pull-up resistor. The input should be left open if not used. MR ¯¯¯ 3 3 4 4 V Power supply voltage that is monitored. CC BLOCK DIAGRAM CAT812 VCC RESET + – RESET & DIGITAL DELAY VCC TOLERANCE BIAS VOLTAGE REFERENCE GND CAT811 VCC RESET + – RESET & DIGITAL DELAY VCC TOLERANCE BIAS VOLTAGE REFERENCE GND VCC VCC MR MR Doc. No. MD-3005 Rev. U 2 © 2010 SCILLC. All rights reserved. Characteristics subject to change without notice |
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