MC68HC05E0 datasheet(7/96 Pages) MOTOROLA

Part #	MC68HC05E0

Description	High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit

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Manufacturer	MOTOROLA [Motorola, Inc]

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MC68HC05E0

MOTOROLA

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TABLE OF CONTENTS

1

INTRODUCTION

1.1

General ..................................................................................................................1-1

1.2

Features.................................................................................................................1-1

2

FUNCTIONAL PIN DESCRIPTION

2.1

VDD and VSS ........................................................................................................2-1

2.2

OSC1/OSC2 ..........................................................................................................2-1

2.2.1

Crystal..............................................................................................................2-1

2.2.2

Ceramic Resonator ..........................................................................................2-1

2.2.3

External Clock..................................................................................................2-2

2.3

RESET...................................................................................................................2-2

2.4

Port A (PA0 - PA7) .................................................................................................2-2

2.5

Port B (PB0 - PB7).................................................................................................2-2

2.6

Port C (PC0 - PC7) ................................................................................................2-2

2.7

Port D (PD0 - PD7) ................................................................................................2-4

2.8

Port E (PE0 - PE3).................................................................................................2-4

2.9

CSROM .................................................................................................................2-4

2.10

INTX ......................................................................................................................2-5

2.11

TS ..........................................................................................................................2-5

2.12

TEST .....................................................................................................................2-5

2.13

Expanded Address Bus (A0 – A12) .......................................................................2-5

2.14

External Data Bus (D0 – D7) .................................................................................2-5

3

CPU CORE AND INSTRUCTION SET

3.1

Registers ...............................................................................................................3-1

3.1.1

Accumulator (A) ...............................................................................................3-1

3.1.2

Index register (X)..............................................................................................3-2

3.1.3

Program counter (PC) ......................................................................................3-2

7

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