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NBXSPA022 Datasheet(PDF) 2 Page - ON Semiconductor |
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NBXSPA022 Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 6 page NBXSPA022 http://onsemi.com 2 NC OE GND CLK VDD CLK 1 2 3 6 5 4 Figure 2. Pin Connections (Top View) Table 1. PIN DESCRIPTION Pin No. Symbol I/O Description 1 OE LVTTL/LVCMOS Control Input Output Enable Pin. When left floating pin defaults to logic HIGH and output is active. See OE pin description Table 2. 2 NC N/A No Connect 3 GND Power Supply Ground 0 V 4 CLK LVDS Output Non−Inverted Clock Output. Typically loaded with 100 W receiver termination resistor across differential pair. 5 CLK LVDS Output Inverted Clock Output. Typically loaded with 100 W receiver termination resistor across differential pair. 6 VDD Power Supply Positive power supply voltage. Voltage should not exceed 2.5 V ±5% or 3.3 V ±10%. Table 2. OUTPUT ENABLE TRI−STATE FUNCTION OE Pin Output Pins Open Active HIGH Level Active LOW Level High Z Table 3. ATTRIBUTES Characteristic Value Input Default State Resistor 170 kW ESD Protection Human Body Model Machine Model 2 kV 200 V Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test 1. For additional Moisture Sensitivity information, refer to Application Note AND8003/D. Table 4. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Units VDD Positive Power Supply GND = 0 V 4.6 V Iout LVDS Output Current Continuous Surge 25 50 mA TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −55 to +120 °C Tsol Wave Solder See Figure 5 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. |
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