1

2

3

4

EN

SYNC

PGD

VBST

12

11

10

9

16

VDD

AGND

FB

COMP

15

14

13

5

6

7

8

TPS53311

RGT Package

(Top View)

TPS53311

SLUSA41 – JUNE 2010

www.ti.com

PIN FUNCTIONS

PIN

DESCRIPTION

NAME

NO.

AGND

11

G

Device analog ground terminal.

COMP

9

O

Error amplifier compensation terminal. Type III compensation method is recommended for stability.

EN

1

I

Enable. Internally pulled up to VDD with a 1.35-M

Ω resistor.

FB

10

I

Voltage feedback. Use for OVP, UVP and PGD determination.

PGD

3

O

Power good output flag. Open drain output. Pull up to an external rail via a resistor.

15

PGND

P

IC power GND terminal.

16

Mode configuration pin (with 10 µA current):

Connecting to ground: Forced CCM slave

Pulled high or floating (internal pulled high): Forced CCM master

PS

8

I

Connect with 24.3 k

Ω to GND: DE slave

Connect with 57.6 k

Ω to GND: HEF mode

Connect with 105 k

Ω to GND : reserved mode

Connect with 174 k

Ω to GND: DE master.

Synchronization signal for input interleaving. Master SYNC pin sends out 180° out-of-phase signal to slave

SYNC

2

B

SYNC. SYNC frequency must be within ±20% of slave nominal frequency.

5

SW

6

B

Output inductor connection to integrated power devices.

7

VBST

4

P

Supply input for high-side MOSFET (bootstrap terminal). Connect capacitor from this pin to SW terminal.

VDD

12

P

Input bias supply for analog functions.

13

VIN

P

Gate driver supply and power conversion voltage.

14

(1)

I – Input; B – Bidirectional; O – Output; G – Ground; P – Supply (or Ground)

6

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