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SN65HVD1785DG4 Datasheet(PDF) 2 Page - Texas Instruments |
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SN65HVD1785DG4 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 24 page R RE DE D V CC B A GND SN65HVD1785,1786,1787 DorP Package (TopView) 1 2 3 4 8 7 6 5 P0066-02 1 2 3 4 5 6 7 14 13 12 11 10 9 8 NC GND GND Z Y NC R RE DE D V CC V CC A B SN65HVD1791,1792,1793 DPackage (TopView) LogicDiagram(PositiveLogic) S0299-01 1 2 3 4 6 7 A B R RE DE D Bus LogicDiagram(PositiveLogic) 2 3 4 5 12 10 9 11 A Z Y B R RE DE D S0300-01 SN65HVD1785, SN65HVD1786 SN65HVD1787, SN65HVD1791 SN65HVD1792, SN65HVD1793 SLLS872H – JANUARY 2008 – REVISED FEBRUARY 2010 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. DEVICE INFORMATION DRIVER FUNCTION TABLE Input Enable Outputs D DE A B H H H L Actively drive bus high L H L H Actively drive bus low X L Z Z Driver disabled X OPEN Z Z Driver disabled by default OPEN H H L Actively drive bus high by default RECEIVER FUNCTION TABLE Differential Input Enable Output VID = VA – VB RE R VIT+ < VID L H Receive valid bus high VIT– < VID < VIT+ L ? Indeterminate bus state VID < VIT– L L Receive valid bus low X H Z Receiver disabled X OPEN Z Receiver disabled by default Open-circuit bus L H Fail-safe high output Short-circuit bus L H Fail-safe high output Idle (terminated) bus L H Fail-safe high output NC - No internal connection Pins 6 and 7 are connected together internally. Pins 13 and 14 are connected together internally. 2 Submit Documentation Feedback Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): SN65HVD1785, SN65HVD1786 SN65HVD1787, SN65HVD1791 SN65HVD1792, SN65HVD1793 |
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