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NP8P128AE3B1760E Datasheet(PDF) 1 Page - Numonyx B.V |
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NP8P128AE3B1760E Datasheet(HTML) 1 Page - Numonyx B.V |
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1 / 92 page  316144-07 July 2010 Numonyx® Omneo™ P8P PCM 128-Mbit Parallel Phase Change Memory Datasheet Product Features High Performance Read/Write — 115 ns initial read access — 135 ns initial read access — 25 ns 8-word asynchronous-page read Architecture — Asymmetrically-blocked architecture — Four 32-KByte parameter blocks: top or bottom configuration —128-KByte main blocks — Serial Peripheral Interface (SPI) to enable lower pin count on-board programming Phase Change Memory (PCM) — Chalcogenide phase change storage element — Bit alterable write operation Voltage and Power —VCC (core) voltage: 2.7 V – 3.6 V —VCCQ (I/O) voltage: 1.7 V – 3.6 V — Standby current: 80 µA (Typ) Quality and Reliability — More than 1,000,000 write cycles — 90 nm PCM technology Temperature — Operating temperature -30 °C to +85 °C (135ns initial read access) — Operating temperature 0 °C to +70 °C (115ns initial read access) Security — One-Time Programmable Registers: • 64 unique factory device identifier bits • 2112 user-programmable OTP bits — Selectable OTP Space in Main Array: • Four pre-defined 32-KByte blocks (top or bottom configuration) • Three adjacent Main Blocks available for boot code or other secure information — Absolute write protection: VPP = VSS — Power-transition erase/program lockout — Individual zero-latency block locking — Individual block lock-down Simplified Software Management — No block erase or cleanup required — Bit “twiddle” in either direction (1:0, 0:1) — 35 µs (Typ) program suspend — 35 µs (Typ) erase suspend — Numonyx™ Flash Data Integrator optimized — Scalable Command Set and Extended Command Set compatible — Common Flash Interface capable Density and Packaging — 128 Mbit density — 56-Lead TSOP package — 64-Ball Numonyx Easy BGA package |
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